Neural Methods for Resolving Hard-to-Predict Branches
MS thesis on using shallow neural networks to predict branch outcomes when used in conjunction with existing predictors [ PDF]
Georgia Tech Computer Science
PhD student
Email: pgupta91@gatech.edu
Google Scholar
Hi! Welcome to my page. I am a Ph.D. student at the Georgia Institute of Technology advised by Dr. Tom Conte. I work on digital architectures for superconducting logic families. My past interests include Branch Prediction, RISC-V, and GPU Architectures. My Master's Thesis largely focused on using multi-layer perceptrons and shallow neural networks to build branch prediction schemes. Check out my research areas and publications for more information!
Directed Dataflow architectures are good candidates for hybrid/non Von Neumann architectures as they explicitly define instruction level parallelism. Due to the way these machines are designed, they are likely candidates for superconducting logic families.
Superconducting logic families like RSFQ and RQL enable highly energy efficient architecture. These logic families come with circuit and architecture restrictions that present interesting challenges to architecture that I enjoy exploring
Neural computation can enable prediction schemes to filter out spurious branches and perform history realignment, enabling effective predictions for hard-to-predict branches. I am interested in building dynamic online CNN-esque prediction mechanisms.
MS thesis on using shallow neural networks to predict branch outcomes when used in conjunction with existing predictors [ PDF]
Exploration of SHA-2 and AES-256 hash/encryption acceleration in an extensible open source RISC-V GPGPU (Vortex) [ PDF]